Microarchitecture and RTL Engineer

Publicado en Diseño y realización de circuitos electrónicos, Diseño y realización de componentes electrónicos, Diseño y realización de equipos electrónicos completos el 10 may, 2019

Borsa de Treball de Catalunya Barcelona

Microarchitecture and RTL Engineer (RE)

About BSC


The Barcelona Supercomputing Center – Centro Nacional de Supercomputación (BSC-CNS) is the leading supercomputing center in Spain. It houses MareNostrum, one of the most powerful supercomputers in Europe, and is a hosting member of the PRACE European distributed supercomputing infrastructure. The mission of BSC is to research, develop and manage information technologies in order to facilitate scientific progress. BSC combines HPC service provision and R&D into both computer and computational science (life, earth and engineering sciences) under one roof, and currently has over 500 staff from 44 countries.


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Context And Mission


BSC is looking to expand its expertise towards the design and verification of IPs to be integrated into top-level HPC SoC designs. This position is to work in the European Processor Initiative (EPI project). In particular, in the design of the RISCV core and in the vector unit.


Key Duties


We use vertical approach, so we are looking for proactive and independent profiles able to handle the whole design chain: understand the problem to be solved, code it in some HDL and take it down at RTL level. We believe this approach give us control and fast feedback on architectural parameters that are relevant in HPC (e.g. area, timing, power consumption).

You should have strong RTL and (micro-)architecture experience as well as interest into RISC-V design for applying to this position: processor pipeline, cache, vector unit and memory controller will be your basic components within the design and verification group at BSC.





Phd in Electronics or Computer Engineering or Computer Science

 Essential Knowledge and Professional Experience

Experience in chip design

 Additional Knowledge and Professional Experience

Expertise in RTL (Verilog, System Verilog, VHDL) (2 or more years)

Expertise working with FPGAs (2 or more years)

Expertise in Out of Order Architectures (2 or more years)


Capacity to interact and build strong relations with computer scientists

Excellent written and verbal communication skills

Ability to take initiatives, prioritize the tasks and work under set deadlines

Ability to manage a group of students or engineers

Ability to work both independently and within a team

Fluent English, both written and spoken, another language would be a plus




The position will be located at BSC within the Computer Sciences Department

We offer a full-time contract, a good working environment, a highly stimulating environment with state-of-the-art infrastructure, flexible hours, extensive training plan, tickets restaurant, private health insurance, fully support to the relocation procedures

Duration: Temporary – 2.5 years renewable

Salary: we offer a competitive salary commensurate with the qualifications and experience of the candidate and according to the cost of living in Barcelona

Starting date: Asap


Applications Procedure


All applications must include:


A motivation letter with a statement of interest in English, including two contacts for further references – Applications without this document will not be considered


A full CV including contact details in English





The vacancy will remain open until suitable candidate has been hired. Applications will be regularly reviewed and potential candidates will be contacted.


Diversity and Equal Opportunity Employment


BSC-CNS is an equal opportunity employer committed to diversity and inclusion. We are pleased to consider all qualified applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or any other basis protected by applicable state or local law.


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